ACS11001 1 TURN OVER
Ancillary Material:
Open-book examination
DEPARTMENT OF AUTOMATIC CONTROL & SYSTEMS ENGINEERING
Autumn Semester 2020–21
ACS11001 DIGITAL AND EMBEDDED SYSTEMS 2 hours
The 2-hour duration of this examination comprises 1.5 hours of working time plus 30
minutes for upload and submission.
Answer ALL questions in Section A and Section B, and submit A SEPARATE document per
question. For full submission instructions, see
https://www.sheffield.ac.uk/apse/digital/crowdmark/student
You are advised to spend 15 minutes on each question in Section A and 30 minutes on the
question in Section B.
Solutions will be considered in the order that they are presented in the answer book. Trial
answers will be ignored if they are clearly crossed out.
All questions in Section A are marked out of 10 while the question in Section B is marked
out of 20. The breakdown on the right-hand side of the paper is meant as a guide to the
marks that can be obtained from each part.
This is an open-book examination. You may refer to any of the course materials and wider
resources relevant to the module. All work must be entirely your own, and you may not
engage help from other persons or systems (including Wolfram Alpha, Mathematica, and
any homework) to complete the examination.
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ACS11001 3 TURN OVER
Section A.
You are advised to spend 15 minutes on each question in this section.
1. For this question, a mark of zero will be awarded for both parts (a) and (b) if only final answers
are provided. Please show your workings.
a) Find the base-7 number which represents the number (2B9)13.
[5 marks]
b) Show how the operation below can be performed using 8-bit signed binary numbers with 2’s
complement if necessary.
1910 − 2510
[5 marks]
2. The function F is represented by the following product-of-sum form
𝐹𝐹(𝐴𝐴,𝐵𝐵, 𝐶𝐶, 𝐷𝐷) = ∏(0,1, 2, 5, 8, 9, 10, 11,13)
a) Use the Karnaugh map to obtain the simplified Boolean expression for the function F.
[4 marks]
b) Draw the digital logic circuit to implement the function F using only NOR gates.
[6 marks]
3. Implement the function F given below with d as the don’t care conditions, using a minimal
network of 2-to-1 multiplexers by drawing the logic diagram.
𝐹𝐹(𝐴𝐴, 𝐵𝐵, 𝐶𝐶,𝐷𝐷) = ∑(0, 1, 5, 7, 11, 14) + ∑ 𝑑𝑑(3, 6, 12, 15)
[10 marks]
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4. (a) Simplify, as much as possible, the following Boolean expression using Boolean algebra
rules or the deMorgan’s theorem.
[4 marks]
(b) Use a 3-to-8 decoder to create a circuit with three inputs A, B, and C and two outputs, Y1
(even) and Y2 (odd). If the input ABC is even the output Y1 should be 1 and the output Y2
should be 0. Similarly, if the input ABC is odd then Y1 should be 0 and Y2 should be 1.
[6 marks]
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Section B
You are advised to spend 30 minutes on the question in this section.
5. Sixteen sensors are installed around a pipeline to detect and measure the level of corrosion
and defects. Each sensor produces a 4-bit Gray code number as the output when it detects a
particular defect. Sensor 1 produces a Gray code value of 0000, Sensor 2 produces 0001 and
so on. This is illustrated in Figure 5.1 where the numbers outside the circle are the decimal
numbers 0 through to 15, a black area denotes a logic 1 while a white area denotes a logic 0.
You are required to design a logic circuit that takes these sensor values and produces a 3-bit
binary output indicating which quadrant of the pipe the defect originates from. Use Karnaugh
maps to find minimal expressions for the output and implement them with any logic gates.
Example: Sensor 0 and Sensor 1 indicate a defect on quadrant 000, while Sensor 2 and Sensor
3 indicate a defect in quadrant 001. (see Figure 5.2)
Figure 5.1. 16 Gray-coded sensor outputs. Figure 5.2. 3-Bit outputs of the logic circuit.
a) Draw the truth table for the circuit.
[6 marks]
b) Draw the Karnaugh maps for all the outputs and write the minimised Boolean expressions.
[6 marks]
c) Draw a circuit diagram for all the outputs.
[4 marks]
d) Describe why the use of 4-bit Gray code to 3-bit binary code conversion is an advantage
for this application.
[4 marks]
End of Question Paper