CS-211 Fall 2017 Project 2 Due: Nov. 04, 2018
Simulating Verilog
Background
Verilog is a hardware description language – a text-based syntax used to describe an electronic
circuit at a slightly abstract level. We will use Verilog to describe a gate level digital circuit. See
the Project lecture on Verilog for more details on the Verilog language itself.
You might wish to use some of the techniques described in the lecture on formal languages,
specifically, invoke the tokenizer provided in tokenizeVerilog.c and tokenizeVerilog.h. There
should be no need to modify these files, but if you use them, you will need to create a multi-file
program, as described in the lecture on multi-file programs.
One other technique that is vital to this program is the ability to allow sub-functions to modify
arrays passed in as arguments. More detail on this feature of the C language is available in the
lecture on Array Parameters.
Finally, two example Verilog circuit files are provided, written in the simplified version of
Verilog that we are supported. The first is a very simple two-input multiplexor (MUX) circuit in
mux.v. The second is a one-bit adder that takes carry in, operand A, and operand B inputs, and
provides a SUM output as well as a carry out output, in fullAdder.v.
Project Description
Write a C program called simCircuit.c that takes several command line arguments – the first is
the name of the circuit. All other command line arguments are input values for the input pins of
the circuit, in the order defined in the Verilog “input” statement (these arguments should have
a value of ‘0’ or ‘1’.) Read the Verilog description of the circuit in file circuit_name.v in the
current directory, and simulate the behavior. of the circuit, calculating the net values for all
input nets, internal nets, and output nets. When finished, print all net values in the form.
Inputs: input_net=value, input_net=value, …
Wires: internal_net=value, internal_net=value, …
Outputs: output_net=value, output_net=value, …
For instance, if you simulate the mux described in lectures, with an executable called
“simCircuit” using the following command:
./simCircuit mux 0 0 0
… then the output should be:
Inputs: A=0 B=0 SEL=0
Wires: Asel=0 Bsel=0 notSEL=1
Outputs: Z=0
Hints and Assumptions Allowed
Here are some hints and assumptions that you may use:
CS-211 Fall 2017 Project 2 Due: Nov. 04, 2018
1. The largest number of pins or nets in any one circuit will not exceed 256.
Project Submission
Upload your simCircuit.c file in the Project 2 submission area on MyCourses in the Content area
under “Project Submissions”.
Project Grading
After the due date, your submission will be graded as follows. The project is worth 100 points.
Your code will be compared to all other student’s code using an automated code plagiarism
checker that can detect copied code even if you try to “fix” it after copying. Then, your code will
be compiled on a Linux Lab machine. If there are compiler errors, the professor will attempt to
fix your code. If your code can be fixed, the rest of the grading will be performed on that fixed
code. Once compiled, your code will be tested with various input files, including mux.v,
fullAdder.v, and some other unpublished Verilog file. If the Verilog file contains a semantic
error, then no deductions will occur for “incorrect” or missing net values. If the number of
command line arguments is not correct, your program should end with a message indicating
so… no deductions will be incurred for net value results in this case.
Points will be deducted for the following reasons:
Problem Deduction
Compiler error that can be fixed -15 points per error
Unfixable compiler error, or >4 errors -60 points
Compiler warning messages -5 points per type of warning message
Illegible or Poorly formatted code Up to -10 points
Incorrect results -10 points per invocation (up to -40 points)
Late submission -10 points per every 24 hours late
Code matches another student’s code -100 points
I will give up to 20 “extra credit” points for detecting semantic errors in the Verilog input files.
For instance, if a pin in the module pin list does not appear in an input or output net declaration
statement, and your program prints a message about that problem, you will get 5 points extra
credit. These extra credit points will be used only for this assignment, and only to counteract
other deductions. In other words, if you had a compiler error that could be fixed (15 point
deduction), and a find an error (5 extra credit points) and no other deductions, you would get a
90/100 on this project instead of an 85. Extra credit cannot get your grade above 100.