Assignment 1
Marks for this assignment contribute 5% of the overall course mark.
Marks for functionality will be awarded automatically by the web
submission system.
Due dates: Milestone 11:55pm Friday of week 6. Final - 11:55pm
Friday of week 7.
Late penalties:The maximum mark awarded will be reduced by 25% per
day / part day late. Marks above the cap will be discarded.
Core Body of Knowledge (CBOK) Areas: abstraction, design, hardware
and software, data and information, and programming.
Project Description
In this assignment you will complete two implementation of machine
language
First implementation is project 05 (Links to an external site.)Links to an
external site. in the nand2tetris course. This means you need to complete the
3 chips definitions in the nand2tetris/projects/05 directory.
Descriptions of what each of these parts do are contained in chapter 5 of the
textbook.
Second implementation extends the hack platform. to support a register bank
with 4 data registers. Description of the Hack4D platform. is provided
below.
SVN Repository
You must create a directory in your svn repository named:
//cs/assignment1
Submission and Marking Scheme
This assignment has two assignments in the web submission
system named:
Assignment 1 - Milestone Submissions: due 11:55pm Friday 20th April
Assignment 1 - Final Submissions: due 11:55pm Friday 27th April
The web submission system will test all of your project 05 chips. Your
logbook should now contain entries for all your work on both the milestone
and final submissions.
As for all other assignments this semester, your mark for the final submission
will be calculated as:
min(marks_for_code,marks_for_log_book)
this makes your logbook vital to your assignment mark. Important: the
logbook must have entries for all work in this assignment. See
the Assessment for Practical Assignments page for a detailed description of
what is expected from your logbook.
Setup and Submission
Make sure you have downloaded your nand2tetris software suite (Links to an
external site.)Links to an external site..
Run the following commands to set up a repository directory for the
assignment: (note: you need to replace ,
and with your username, the current year and current
semester respectively - see the Assessment Practical Assignments page)
svn mkdir --parents -m "assign1 setup" https://version-control.adelaid
e.edu.au/svn////cs/assignment1
Now change to the directory where you wish to place copies of your
assignment work. Check out the empty assignment into this directory and
copy the starting files across.
svn co https://version-control.adelaide.edu.au/svn///
/cs/assignment1
cd assignment1
cp /projects/05/* .
svn add *.hdl
svn commit -m "CS starting assignment 1"
You now have a working copy of the assignment1 directory where you
can edit and test your files for this project.
Subversion
If you create new files that need to be saved in your svn repository, you need
to tell svn about them using the following command:
svn add
After each session of editing, you must commit your changes to the working
to your repository by using the following command:
svn commit -m "your comment here"
If you have checked out multiple working copies they will not know about
each other. If you always remember to commit when you finish working, the
repository will always be up to date. You can then get a working copy to be
up to date by using the command:
svn update
Logbook
As you work on the project you will find, on the "View Feedback" tab for the
assignment in the web submission system, a link to add entries to your
logbook. For expectations of the logbook see the Assessment for Practical
Assignments page. Write in the logbook as you go and frequently commit
changes to svn. It is vital that you do not leave this until the end. The marker
will see your logbook with all of your svn commits and web submission
interleaved. If the commits and web submissions are not interleaved with
the logbook entries you may not get marks for your work.
Submission - The only way to get marks for your work!
When you are ready to submit your work you should navigate to this
assignment in the web submission system and follow the prompts to submit
your work. This is the only way to get marks. If there is no web submission
your mark will be 0.
Again, and this is really important don't forget to add logbook entries as
you go. If you don't you will not get marks.
Assignment 1 Description
Background
A typical computer architecture is based on a set of elementary logic gates
like And, Or, Mux, etc., as well as their bit-wise versions And16, Or16, Mux16,
etc. (assuming a 16-bit machine). This project completes the implementation
of the hack machine based on the machine language described in chapter 4.
The CPU of the hack machine has only 2 data registers: A, D. However, most
RISC machines have a register bank, usually 32 registers, so that most
temporal variables are stored in them instead of using a memory location,
which slows down the execution cycle. Thus, in the second part of the project
we will replace the D register of the hack architecture with a register bank
that holds 4 data registers D0, D1, D2 and D3. Our D4hack machine would
support operations between data registers such as D3 = D1 +A or D0 =
D1 + D2, operation between data registers and memory ie. D2 = D0 + M,
and store the result either in a register or in memory.
Prerequisites
Knowledge of projects 1 to 3, which you should have completed to prepare
for the in-class exams.
Objectives
Milestone
Build the 3 components described in Chapter 5 (see list below), yielding a
basic hack machine
Chip (HDL) Description Testing
Memory.hdl Entire RAM
address space
Test this chip using Memory.tst and
Memory.cmp
CPU.hdl The Hack CPU
Recommended test files: CPU.tst and
CPU.cmp.
Alternative test files (less thorough but do not
require using the built-in DRegister):
CPU-external.tst and CPU-external.cmp.
Computer.hdl
The
platform's
top-most
chip
Test by running some Hack programs on the
constructed chip. See more instructions below.
Final Submission (should include all chips from milestone plus the 3 new
chips listed below)
Extend the machine to support a register bank of 4 registers as follows
Chip (HDL) Description Testing
Memory.hdl Entire RAM address space Test this chip using Memory.tst and Memory.cmp
RegisterBank4 Register bank
It provides the output of two registers and can update one
register each clock cycle. Test
with RegisterBank4.tst and RegisterBank4. cmp
CPU4D.hdl The Hack4D CPU Use test files CPU4D.tst and CPU4D. cmp
Computer4D.hdl The platform's top-most chip
Test by running Simple.hack on the constructed chip with test
files Computer4DSimple.tst, Computer4DSimple.cmp.
Test with Countdown.hack on the constructed chip with test
files Computer4DCountdown.cmp Computer4DCountdown.tst.
The Hack4D machine language contains 3 types of instructions:
the A instruction, starting with 0x, which is similar to the hack version of
it.
The D instruction (starting with 10), which describes an ALU operation
dest = operand1 op operand2, where the first operand is a data register
D0/D1/D2/D3 and the second operand is either a data register, A, M or
zero.
The J instruction (starting with 11), which describes a Jump instruction
depending on the value of operand1 op operand2
Here are the details of the Hack4D coding scheme and CPU4D diagram.
Contract
When loaded into the supplied Hardware Simulator, your chip design
(modified .hdl program), tested on the supplied .tst script, should produce
the outputs listed in the supplied .cmp file. If that is not the case, the
simulator will let you know.
Resources
The relevant reading for this project is Chapters 4 and 5. We have covered
the hack implementation in lectures 8 and 9, as well as workshop 5.
If you've downloaded the nand2tetris software suite (Links to an external
site.)Links to an external site., you will find the supplied Hardware Simulator
and all the necessary project files in the tools and in the projects/05
directories, respectively. You should by now be acquainted with the
Hardware Simulator as per workshop exercises, but here is a link to the
supplied Hardware Simulator Tutorial (Links to an external site.)Links to an
external site..