A instruction 0 load value into A
The A instruction is the same than in the hack machine
D Instruction 1 1 s1 s2 c1 c2 c4 c5 c6 a1 a2 b1 b2 d1 d2 d3 dest = operand1 op operand2
D instruction extends the C instruction by having a bank of data registers
First operand is a data register selected by a1-a2
Second operand is a data register (selected by b1-b2) or A or M or 0
Destination is either a data register, A or M or none as per destination table
Operation selected by c1c2c4c5c6 (note c3 is always 0, so it is not included in the instruction, be careful to modify that)
Destination table Register source bits operand1
d1 d2 d3 a1 a2 d_a
0 0 0 D_0 register D[0] 0 0 D_0 register D[0]
0 0 1 D_1 register D[1] 0 1 D_1 register D[1]
0 1 0 D_2 register D[2] 1 0 D_2 register D[2]
0 1 1 D_3 register D[3] 1 1 D_3 register D[3]
1 0 0 null no destination
1 0 1 A A register b1 b2 d_b
1 1 0 M Memory[a] 0 0 D_0 register D[0]
1 1 1 AM Both A and M 0 1 D_1 register D[1]
1 0 D_2 register D[2]
1 1 D_3 register D[3]
Mux sel bits s1 s2 operand2
0 0 0
0 1 d_b
1 0 A
1 1 M
v v v v v v v v v v v v v v v v
J instruction 10 s1 s2 c1 c2 c4 c5 c6 a1 a2 b1-b2 j1 j2 j3
J instruction is a jump instruction, in which the result of the operation determines the jump condition.
Thus is similar to D, except that the last 3 bits are used to implement the jump logic as per hack machine
j1 j2 j3 Register source bits operand1
0 0 0 null a1 a2 d_a
0 0 1 JGT 0 0 D_0 register D[0]
0 1 0 JEQ 0 1 D_1 register D[1]
0 1 1 JGE 1 0 D_2 register D[2]
1 0 0 JLT 1 1 D_3 register D[3]
1 0 1 JNE
1 1 0 JLE b1 b2 d_b
1 1 1 JMP 0 0 D_0 register D[0]
0 1 D_1 register D[1]
1 0 D_2 register D[2]
1 1 D_3 register D[3]
Mux sel bits s1 s2 operand2
0 0 0
0 1 d_b
1 0 A
1 1 M